Active Disturbance Rejection Control Based Virtual Synchronous Generator for Grid-Forming Inverters in Weak Grids
The displacement of synchronous generation by inverter-based resources has weakened grid strength at many points of interconnection, exposing the fixed-gain PI controllers used in conventional Virtual Synchronous Generator (VSG) inner loops to degraded performance under low short-circuit ratio (SCR) conditions. This dissertation develops an Active Disturbance Rejection Control (ADRC)-based VSG for a gridforming inverter, in which the inner PI voltage and current controllers are replaced with a first-order ADRC structure using a linear extended state observer (LESO) to estimate and cancel disturbances arising from cross-coupling, parameter mismatch, and grid-side loading in real time. The six ADRC parameters are tuned via particle swarm optimization (PSO) against a composite transient performance objective.
The proposed ADRC-VSG and a conventional PI-VSG were implemented in a MATLAB Simulink–PLECS co-simulation of a 5 MVA, 690 V grid-forming inverter connected to a weak grid (SCR = 1.5, X/R = 7.0), and compared under power reference steps, a ±60° grid phase-angle disturbance, and a ±20% filter inductance variation. ADRC matched or outperformed the PI baseline on nearly every metric, with modest gains under nominal tracking (10–39% faster settling), larger gains under the phase-angle disturbance (up to 89% faster peak time), and the most significant gains under filter-inductance mismatch (77–97% reduction in peak deviation and RMSE). These results confirm that applying ADRC at the inner-loop level extends the robust operating range of grid-forming VSG control into weak-grid conditions without sacrificing inertia emulation.